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MRF89XA
2.14.3
FREQUENCY DEVIATION
CONTROL REGISTER DETAILS
REGISTER 2-3:
FDEVREG: FREQUENCY DEVIATION CONTROL REGISTER
(ADDRESS:0X02) (POR:0X03)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-1
R/W-1
FDVAL<7:0>
bit 7
bit 0
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
r = Reserved
bit 7-0
FDVAL<7:0>: Frequency Deviation Value bits
f dev = ---------------------------------------------------
The bits indicate single side frequency deviation (in bit value) in FSK Transmit mode.
FDVAL = 00000011 ≥ f dev = 100 kHz (default)
f xtal
( 32 × ( FDVAL + 1 ) )
Where,
FDVAL is the value in the register and has the range from 0 ≤ FDVAL ≤ 255. Refer to Section 3.3.3,
fdev Setting in FSK Mode and Section 3.3.4, fdev Setting in OOK Mode for more information on the
f dev setting for FSK and OOK modes.
Note 1: f dev is used through out the data sheet to understand the term frequency deviation and is calculated using
FDVAL<7:0> from FDEVREG.
2.14.4
BIT RATE SET REGISTER DETAILS
REGISTER 2-4:
BRSREG: BIT RATE SET REGISTER (ADDRESS:0x03) (POR:0x07)
r
R/W-0
R/W-0
R/W-0
R/W-0
R/W-1
R/W-1
R/W-1
bit 7
—
BRVAL<6:0>
bit 0
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
r = Reserved
f xtal
( 64 ( BRVAL + 1 ) )
bit 7
bit 6-0
Note 1:
Reserved: Reserved bit; do not use
0 = Reserved (default)
BRVAL<6:0>: Bit Rate Value bits
These bits set the bit rate (in bit value) of:
BitRate = --------------------------------------------
BRVAL<6:0> = 0000111 ≥ Bit Rate = 25 kbps NRZ (default)
Where, BRVAL is the value in the register and has the range from 0 ≤ BRVAL ≤ 127
The Bit Rates are good for crystal frequency of 12.8 MHz which is taken as reference throughout the data
sheet.
DS70622C-page 32
Preliminary
? 2010–2011 Microchip Technology Inc.
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